Silicon on Insulator Wafers

Semicera’s Silicon-on-Insulator wafers provide high-performance solutions for advanced semiconductor applications. Ideally suited for MEMS, sensors, and microelectronics, these wafers provide excellent electrical isolation and low parasitic capacitance. Semicera ensures precision manufacturing, delivering consistent quality for a range of innovative technologies. We look forward to being your long-term partner in China.

Silicon on Insulator Wafers from Semicera are designed to meet the growing demand for high-performance semiconductor solutions. Our SOI wafers offer superior electrical performance and reduced parasitic device capacitance, making them ideal for advanced applications such as MEMS devices, sensors, and integrated circuits. Semicera’s expertise in wafer production ensures that each SOI wafer provides reliable, high-quality results for your next-generation technology needs.

Our Silicon on Insulator Wafers offer an optimal balance between cost-effectiveness and performance. With soi wafer cost becoming increasingly competitive, these wafers are widely used in a range of industries, including microelectronics and optoelectronics. Semicera’s high-precision production process guarantees superior wafer bonding and uniformity, making them suitable for a variety of applications, from cavity SOI wafers to standard silicon wafers.

Caractéristiques clés:

       •  High-quality SOI wafers optimized for performance in MEMS and other applications.

       •  Competitive soi wafer cost for businesses seeking advanced solutions without compromising quality.

       •  Ideal for cutting-edge technologies, offering enhanced electrical isolation and efficiency in silicon on insulator systems.

Our Silicon on Insulator Wafers are engineered to provide high-performance solutions, supporting the next wave of innovation in semiconductor technology. Whether you’re working on cavity SOI wafers, MEMS devices, or silicon on insulator components, Semicera delivers wafers that meet the highest standards in the industry.

Articles

Production

Recherche

Factice

Paramètres de cristal

Polytype

4H

Erreur d'orientation de la surface

4±0.15°

Paramètres électriques

Dopant

azote de type N

Résistivité

0,015-0.025ohm · cm

Paramètres mécaniques

Diamètre

150,0 ± 0,2 mm

Épaisseur

350 ± 25 µm

Orientation plate primaire

[1-100]±5°

Longueur plate primaire

47,5 ± 1,5 mm

Plat secondaire

Aucun

TTV

≤5 µm

≤10 µm

≤15 µm

LTV

≤3 μm (5 mm * 5 mm)

≤5 μm (5 mm * 5 mm)

≤10 μm (5 mm * 5 mm)

Arc

-15 μm ~ 15μm

-35 μm ~ 35 μm

-45 μm ~ 45 μm

Chaîne

≤35 µm

≤45 µm

≤55 µm

Rugosité avant (si-face) (AFM)

Ra≤0,2 nm (5 μm * 5 μm)

Structure

Densité de micro-

<1 ea / cm2

<10 ea / cm2

<15 ea / cm2

Impuretés métalliques

≤5E10atoms/cm2

N / A

BPB

≤1500 ea / cm2

≤3000 ea / cm2

N / A

TSD

≤500 ea / cm2

≤1000 ea / cm2

N / A

Qualité avant

Devant

Si

Finition de surface

CMP SI-FACE

Particules

≤60ea / plaquette (taille 0,3 μm)

N / A

Rayures

≤5EA / MM. Longueur cumulative ≤ diamètre

Longueur cumulatif ≤2 * diamètre

N / A

PELLE / PEPES ORANGE / TAPPES / COMMENTS / CRESCHES / CONTAMINATION

Aucun

N / A

Coups de bord / retraits / fracture / plaques hexagonales

Aucun

Zones de polytype

Aucun

Zone cumulative≤20%

Zone cumulative ≤ 30%

Marquage laser avant

Aucun

Qualité du dos

Finition arrière

CMP C-FACE

Rayures

≤5ea / mm, longueur cumulative≤2 * diamètre

N / A

Défauts arrière (puces de bord / retraits)

Aucun

Rugosité du dos

Ra≤0,2 nm (5 μm * 5 μm)

Marquage laser arrière

1 mm (du bord supérieur)

Bord

Bord

Chanfreiner

Conditionnement

Conditionnement

Préparé en épi avec un emballage sous vide

Emballage de cassette multi-wafer

*Remarques: «NA» signifie qu'aucun élément de demande non mentionné ne peut se référer au semi-std.

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Wafers SIC

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