Semicera’s P-type SiC Substrate Wafer is engineered for superior electronic and optoelectronic applications. These wafers provide exceptional conductivity and thermal stability, making them ideal for high-performance devices. With Semicera, expect precision and reliability in your P-type SiC substrate wafers.
Semicera’s P-type SiC Substrate Wafer is a key component for developing advanced electronic and optoelectronic devices. These wafers are specifically designed to provide enhanced performance in high-power and high-temperature environments, supporting the growing demand for efficient and durable components.
The P-type doping in our SiC wafers ensures improved electrical conductivity and charge carrier mobility. This makes them particularly suitable for applications in power electronics, LEDs, and photovoltaic cells, where low power loss and high efficiency are critical.
Manufactured with the highest standards of precision and quality, Semicera’s P-type SiC wafers offer excellent surface uniformity and minimal defect rates. These characteristics are vital for industries where consistency and reliability are essential, such as aerospace, automotive, and renewable energy sectors.
Semicera’s commitment to innovation and excellence is evident in our P-type SiC Substrate Wafer. By integrating these wafers into your production process, you ensure that your devices benefit from the exceptional thermal and electrical properties of SiC, enabling them to operate effectively under challenging conditions.
Investing in Semicera’s P-type SiC Substrate Wafer means choosing a product that combines cutting-edge material science with meticulous engineering. Semicera is dedicated to supporting the next generation of electronic and optoelectronic technologies, providing the essential components needed for your success in the semiconductor industry.
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Elementi |
Produzione |
Ricerca |
Manichino |
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Parametri cristallini |
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Politipo |
4H |
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Errore di orientamento della superficie |
4±0.15° |
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Parametri elettrici |
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Drogante |
azoto di tipo n |
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Resistività |
0,015-0,025ohm · cm |
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Parametri meccanici |
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Diametro |
150,0 ± 0,2 mm |
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Spessore |
350 ± 25 µm |
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Orientamento piatto primario |
[1-100]±5° |
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Lunghezza piatta primaria |
47,5 ± 1,5 mm |
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Piatto secondario |
Nessuno |
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TTV |
≤5 µm |
≤10 µm |
≤15 µm |
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LTV |
≤3 μm (5mm*5mm) |
≤5 μm (5 mm*5 mm) |
≤10 μm (5 mm*5 mm) |
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Arco |
-15μm ~ 15μm |
-35μm ~ 35 μm |
-45μm ~ 45μm |
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Ordito |
≤35 µm |
≤45 µm |
≤55 µm |
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Front (Si-Face) Rughess (AFM) |
RA≤0,2 nm (5μm*5μm) |
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Struttura |
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Densità di micrivipe |
<1 ea/cm2 |
<10 ea/cm2 |
<15 ea/cm2 |
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Impurità dei metalli |
≤5E10atoms/cm2 |
N / A |
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BPD |
≤1500 ea/cm2 |
≤3000 ea/cm2 |
N / A |
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TSD |
≤500 ea/cm2 |
≤1000 ea/cm2 |
N / A |
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Qualità anteriore |
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Davanti |
Si |
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Finitura superficiale |
Si-Face CMP |
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Particelle |
≤60ea/wafer (dimensione≥0,3μm) |
N / A |
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Graffi |
≤5ea/mm. Lunghezza cumulativa ≤Diameter |
Diametro cumulativo della lunghezza ≤2* |
N / A |
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Buccia/pozzi/macchie/striature/crepe/contaminazione |
Nessuno |
N / A |
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Bordo chips/riendi/frattura/piastre esadecimale |
Nessuno |
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Aree politepi |
Nessuno |
Area cumulativa≤20% |
Area cumulativa≤30% |
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Marcatura laser anteriore |
Nessuno |
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Qualità alla schiena |
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Finitura posteriore |
C-FACE CMP |
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Graffi |
≤5ea/mm, lunghezza cumulativa≤2*diametro |
N / A |
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Difetti posteriori (bordo chip/rientri) |
Nessuno |
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Rugosità posteriore |
RA≤0,2 nm (5μm*5μm) |
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Marcatura laser sul retro |
1 mm (dal bordo superiore) |
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Bordo |
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Bordo |
Smussare |
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Confezione |
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Confezione |
Prepasto EPI con imballaggio a vuoto Packaging a cassette multi-wafer |
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*Note : “NA” significa che nessuna richiesta di richiesta non menzionata può fare riferimento a semi-std. |
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