Si epitaxy

Si Epitaxy– Achieve superior device performance with Semicera’s Si Epitaxy, offering precision-grown silicon layers for advanced semiconductor applications.

Semicera introduces its high-quality Si epitaxy services, designed to meet the exacting standards of today’s semiconductor industry. Epitaxial silicon layers are critical for the performance and reliability of electronic devices, and our Si Epitaxy solutions ensure that your components achieve optimal functionality.

Precision-Grown Silicon Layers Semicera understands that the foundation of high-performance devices lies in the quality of the materials used. Our Si epitaxy process is meticulously controlled to produce silicon layers with exceptional uniformity and crystal integrity. These layers are essential for applications ranging from microelectronics to advanced power devices, where consistency and reliability are paramount.

Optimized for Device Performance IL Si epitaxy services offered by Semicera are tailored to enhance the electrical properties of your devices. By growing high-purity silicon layers with low defect densities, we ensure that your components perform at their best, with improved carrier mobility and minimized electrical resistivity. This optimization is critical for achieving the high-speed and high-efficiency characteristics demanded by modern technology.

Versatility in Applications Semicera’s Si epitaxy is suitable for a wide range of applications, including the production of CMOS transistors, power MOSFETs, and bipolar junction transistors. Our flexible process allows for customization based on the specific requirements of your project, whether you need thin layers for high-frequency applications or thicker layers for power devices.

Superior Material Quality Quality is at the heart of everything we do at Semicera. Our Si epitaxy process uses state-of-the-art equipment and techniques to ensure that each silicon layer meets the highest standards of purity and structural integrity. This attention to detail minimizes the occurrence of defects that could impact device performance, resulting in more reliable and longer-lasting components.

Commitment to Innovation Semicera is committed to staying at the forefront of semiconductor technology. Our Si epitaxy services reflect this commitment, incorporating the latest advancements in epitaxial growth techniques. We continuously refine our processes to deliver silicon layers that meet the evolving needs of the industry, ensuring that your products remain competitive in the market.

Tailored Solutions for Your Needs Understanding that every project is unique, Semicera offers customized Si epitaxy solutions to match your specific needs. Whether you require particular doping profiles, layer thicknesses, or surface finishes, our team works closely with you to deliver a product that meets your precise specifications.

Elementi

Produzione

Ricerca

Manichino

Parametri cristallini

Politipo

4H

Errore di orientamento della superficie

4±0.15°

Parametri elettrici

Drogante

azoto di tipo n

Resistività

0,015-0,025ohm · cm

Parametri meccanici

Diametro

150,0 ± 0,2 mm

Spessore

350 ± 25 µm

Orientamento piatto primario

[1-100]±5°

Lunghezza piatta primaria

47,5 ± 1,5 mm

Piatto secondario

Nessuno

TTV

≤5 µm

≤10 µm

≤15 µm

LTV

≤3 μm (5mm*5mm)

≤5 μm (5 mm*5 mm)

≤10 μm (5 mm*5 mm)

Arco

-15μm ~ 15μm

-35μm ~ 35 μm

-45μm ~ 45μm

Ordito

≤35 µm

≤45 µm

≤55 µm

Front (Si-Face) Rughess (AFM)

RA≤0,2 nm (5μm*5μm)

Struttura

Densità di micrivipe

<1 ea/cm2

<10 ea/cm2

<15 ea/cm2

Impurità dei metalli

≤5E10atoms/cm2

N / A

BPD

≤1500 ea/cm2

≤3000 ea/cm2

N / A

TSD

≤500 ea/cm2

≤1000 ea/cm2

N / A

Qualità anteriore

Davanti

Si

Finitura superficiale

Si-Face CMP

Particelle

≤60ea/wafer (dimensione≥0,3μm)

N / A

Graffi

≤5ea/mm. Lunghezza cumulativa ≤Diameter

Diametro cumulativo della lunghezza ≤2*

N / A

Buccia/pozzi/macchie/striature/crepe/contaminazione

Nessuno

N / A

Bordo chips/riendi/frattura/piastre esadecimale

Nessuno

Aree politepi

Nessuno

Area cumulativa≤20%

Area cumulativa≤30%

Marcatura laser anteriore

Nessuno

Qualità alla schiena

Finitura posteriore

C-FACE CMP

Graffi

≤5ea/mm, lunghezza cumulativa≤2*diametro

N / A

Difetti posteriori (bordo chip/rientri)

Nessuno

Rugosità posteriore

RA≤0,2 nm (5μm*5μm)

Marcatura laser sul retro

1 mm (dal bordo superiore)

Bordo

Bordo

Smussare

Confezione

Confezione

Prepasto EPI con imballaggio a vuoto

Packaging a cassette multi-wafer

*Note : “NA” significa che nessuna richiesta di richiesta non menzionata può fare riferimento a semi-std.

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Sic Wafer

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