Silicon Carbide Epitaxy

Silicon Carbide Epitaxy– High-quality epitaxial layers tailored for advanced semiconductor applications, offering superior performance and reliability for power electronics and optoelectronic devices.

Semicera’s Silicon Carbide Epitaxy is engineered to meet the rigorous demands of modern semiconductor applications. By utilizing advanced epitaxial growth techniques, we ensure that each silicon carbide layer exhibits exceptional crystalline quality, uniformity, and minimal defect density. These characteristics are crucial for developing high-performance power electronics, where efficiency and thermal management are paramount.

Der Silicon Carbide Epitaxy process at Semicera is optimized to produce epitaxial layers with precise thickness and doping control, ensuring consistent performance across a range of devices. This level of precision is essential for applications in electric vehicles, renewable energy systems, and high-frequency communications, where reliability and efficiency are critical.

Moreover, Semicera’s Silicon Carbide Epitaxy offers enhanced thermal conductivity and higher breakdown voltage, making it the preferred choice for devices that operate under extreme conditions. These properties contribute to longer device lifetimes and improved overall system efficiency, particularly in high-power and high-temperature environments.

Semicera also provides customization options for Silicon Carbide Epitaxy, allowing for tailored solutions that meet specific device requirements. Whether for research or large-scale production, our epitaxial layers are designed to support the next generation of semiconductor innovations, enabling the development of more powerful, efficient, and reliable electronic devices.

By integrating cutting-edge technology and stringent quality control processes, Semicera ensures that our Silicon Carbide Epitaxy products not only meet but exceed industry standards. This commitment to excellence makes our epitaxial layers the ideal foundation for advanced semiconductor applications, paving the way for breakthroughs in power electronics and optoelectronics.

Artikel

Produktion

Forschung

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Kristallparameter

Polytype

4H

Oberflächenorientierungsfehler

4±0.15°

Elektrische Parameter

Dopant

Stickstoff vom Typ N

Widerstand

0,015-0.025OHM · cm

Mechanische Parameter

Durchmesser

150,0 ± 0,2 mm

Dicke

350 ± 25 µm

Primäre flache Orientierung

[1-100]±5°

Primäre flache Länge

47,5 ± 1,5 mm

Sekundäre flache

Keiner

Ttv

≤5 µm

≤10 µm

≤15 µm

LTV

≤3 μm (5 mm*5 mm)

≤5 μm (5 mm*5 mm)

≤10 μm (5 mm*5 mm)

Bogen

-15 μm ~ 15 μm

-35 μm ~ 35 μm

-45 μm ~ 45 μm

Kette

≤35 µm

≤45 µm

≤55 µm

Front (Si-Face) Rauheit (AFM)

Ra ≤ 0,2 nm (5 & mgr; m*5 μm)

Struktur

Mikropipe -Dichte

<1 EA/CM2

<10 EA/CM2

<15 EA/CM2

Metallverunreinigungen

≤5E10atoms/cm2

N / A

BPD

≤1500 EA/CM2

≤3000 EA/CM2

N / A

TSD

≤500 EA/CM2

≤1000 EA/CM2

N / A

Frontqualität

Front

Si

Oberflächenbeschaffung

Si-Face CMP

Partikel

≤60ea/Wafer (Größe ≥ 0,3 μm)

N / A

Kratzer

≤5ea/mm. Kumulative Länge ≤ Diameter

Kumulative Länge ≤ 2*Durchmesser

N / A

Orangenschale/Pits/Flecken/Streifen/Risse/Kontamination

Keiner

N / A

Kantenchips/Eingeweide/Fraktur-/Sechskantplatten

Keiner

Polytyperbereiche

Keiner

Kumulative Fläche ≤ 2010TP3T

Kumulative Fläche ≤ 30%

Frontlasermarkierung

Keiner

Rückenqualität

Rückbeschluss

C-Face CMP

Kratzer

≤5ea/mm, kumulative Länge ≤ 2*Durchmesser

N / A

Rückenfehler (Kantenchips/Eingebiete)

Keiner

Rückenrauheit

Ra ≤ 0,2 nm (5 & mgr; m*5 μm)

Rückmarkierung von Laser

1 mm (von der Oberkante)

Rand

Rand

Chamfer

Packaging

Packaging

Epi-ready with vacuum packaging

Multi-wafer cassette packaging

*Notes: “NA” means no request Items not mentioned may refer to SEMI-STD.

tech_1_2_size

SiC wafers

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