Silizium auf Isolator Wafern

Semicera’s Silicon-on-Insulator wafers provide high-performance solutions for advanced semiconductor applications. Ideally suited for MEMS, sensors, and microelectronics, these wafers provide excellent electrical isolation and low parasitic capacitance. Semicera ensures precision manufacturing, delivering consistent quality for a range of innovative technologies. We look forward to being your long-term partner in China.

Silicon on Insulator Wafers from Semicera are designed to meet the growing demand for high-performance semiconductor solutions. Our SOI wafers offer superior electrical performance and reduced parasitic device capacitance, making them ideal for advanced applications such as MEMS devices, sensors, and integrated circuits. Semicera’s expertise in wafer production ensures that each SOI wafer provides reliable, high-quality results for your next-generation technology needs.

Our Silicon on Insulator Wafers offer an optimal balance between cost-effectiveness and performance. With soi wafer cost becoming increasingly competitive, these wafers are widely used in a range of industries, including microelectronics and optoelectronics. Semicera’s high-precision production process guarantees superior wafer bonding and uniformity, making them suitable for a variety of applications, from cavity SOI wafers to standard silicon wafers.

Schlüsselmerkmale:

       •  High-quality SOI wafers optimized for performance in MEMS and other applications.

       •  Competitive soi wafer cost for businesses seeking advanced solutions without compromising quality.

       •  Ideal for cutting-edge technologies, offering enhanced electrical isolation and efficiency in silicon on insulator systems.

Our Silicon on Insulator Wafers are engineered to provide high-performance solutions, supporting the next wave of innovation in semiconductor technology. Whether you’re working on cavity SOI wafers, MEMS devices, or silicon on insulator components, Semicera delivers wafers that meet the highest standards in the industry.

Artikel

Produktion

Forschung

Dummy

Kristallparameter

Polytype

4H

Oberflächenorientierungsfehler

<11-20 >4±0.15°

Elektrische Parameter

Dopant

Stickstoff vom Typ N

Widerstand

0.015-0.025ohm·cm

Mechanische Parameter

Durchmesser

150.0±0.2mm

Dicke

350±25 μm

Primäre flache Orientierung

[1-100]±5°

Primäre flache Länge

47.5±1.5mm

Sekundäre flache

Keiner

Ttv

≤5 μm

≤10 μm

≤15 μm

LTV

≤3 μm(5mm*5mm)

≤5 μm(5mm*5mm)

≤10 μm(5mm*5mm)

Bogen

-15μm ~ 15μm

-35μm ~ 35μm

-45μm ~ 45μm

Kette

≤35 μm

≤45 μm

≤55 μm

Front (Si-Face) Rauheit (AFM)

Ra≤0.2nm (5μm*5μm)

Struktur

Mikropipe -Dichte

<1 EA/CM2

<10 EA/CM2

<15 EA/CM2

Metallverunreinigungen

≤5E10atoms/cm2

N / A

BPD

≤1500 ea/cm2

≤3000 ea/cm2

N / A

TSD

≤500 ea/cm2

≤1000 ea/cm2

N / A

Frontqualität

Front

Si

Oberflächenbeschaffung

Si-Face CMP

Partikel

≤60ea/wafer (size≥0.3μm)

N / A

Kratzer

≤5ea/mm. Cumulative length ≤Diameter

Cumulative length≤2*Diameter

N / A

Orangenschale/Pits/Flecken/Streifen/Risse/Kontamination

Keiner

N / A

Kantenchips/Eingeweide/Fraktur-/Sechskantplatten

Keiner

Polytyperbereiche

Keiner

Cumulative area≤20%

Cumulative area≤30%

Frontlasermarkierung

Keiner

Rückenqualität

Rückbeschluss

C-Face CMP

Kratzer

≤5ea/mm,Cumulative length≤2*Diameter

N / A

Rückenfehler (Kantenchips/Eingebiete)

Keiner

Rückenrauheit

Ra≤0.2nm (5μm*5μm)

Rückmarkierung von Laser

1 mm (von der Oberkante)

Rand

Rand

Chamfer

Packaging

Packaging

Epi-ready with vacuum packaging

Multi-wafer cassette packaging

*Notes: “NA” means no request Items not mentioned may refer to SEMI-STD.

tech_1_2_size

SiC wafers

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